
RZ/G3SE Quad Core MPUs
Renesas ElectronicsTCC-2026-09-10-rz-g3se-quad-core-mpus
RZ/G3SE is a scalable IoT-edge MPU series combining dual- or quad-core Arm Cortex-A55 processing with an Arm Cortex-M33 sub-CPU and low-power operating modes.
Introduction
Renesas RZ/G3SE is a scalable IoT-edge MPU series for connected and industrial systems that need application-class processing alongside low-power operating modes. The family combines dual-core or quad-core Arm Cortex-A55 main CPU options with an Arm Cortex-M33 sub-CPU, providing a heterogeneous processing platform for designs that must balance compute capability, peripheral connectivity, and power management.
Technically, the series brings together dual Gigabit Ethernet with IEEE 802.1 TSN support, PCIe Gen2 connectivity, integrated analog acquisition, and security-oriented features including secure boot, Arm TrustZone, secure debug, tamper detection, ECC, and Renesas Secure IP. It is also pin-compatible with the RZ/G3L portfolio.
What it does
The RZ/G3SE is intended as a mid-class processor for power-conscious edge systems. Its Arm Cortex-A55 configuration is available with two or four cores for the main application workload, while the Cortex-M33 sub-CPU can support auxiliary or lower-power processing tasks.
For wired networking, the devices provide two Gigabit Ethernet interfaces with IEEE 802.1 TSN support. A one-lane PCIe Gen2 interface operates at 5.0 GT/s, and the integrated ADC provides eight 12-bit channels for analog inputs. The series also includes an external bus interface supporting 8-bit and 16-bit random access; under normal access without wait states, its theoretical bandwidth is up to approximately 133 MB/s at 133 MHz CKIO.
Power-management options include Idle mode, Sub-CPU mode, and deep standby mode with S2R on/off support. With DDR self-refresh support, standby power consumption is specified in the 1 mW class.
Applications
- Industrial Ethernet edge nodes requiring two Gigabit Ethernet ports and TSN support
- Connected industrial control or gateway equipment with PCIe peripheral expansion
- IoT-edge systems combining Linux-based application processing with a Cortex-M33 sub-CPU
- Equipment requiring integrated 12-bit analog-input acquisition
- Industrial designs operating across a junction-temperature range of -40°C to +125°C
- Platform updates from pin-compatible RZ/G3L designs
Design considerations
The RZ/G3SE is offered in two LFBGA package options: a 17 mm × 17 mm, 368-pin package with 0.65 mm pitch, and a 14 mm × 14 mm, 400-pin package with 0.5 mm pitch. Package selection therefore affects PCB routing density and assembly requirements.
System architects should account for the intended Ethernet, PCIe, DDR self-refresh, analog-input, and external-bus connections early in board design. For software planning, the supplied information identifies support for the CIP Linux SLTS kernel v6.12 with long-term maintenance support. The stated pin compatibility with the RZ/G3L portfolio may also be relevant when evaluating platform continuity across related designs.
Availability and further information
The source/distributor and datasheet links on this page provide further technical information on the Renesas RZ/G3SE MPU series, including device-specific details and supporting documentation.
Specifications
| Manufacturer | Renesas Electronics |
|---|---|
| Part number | TCC-2026-09-10-rz-g3se-quad-core-mpus |
| Series | RZ/G3SE |
| Technology | Arm Cortex-A55 and Cortex-M33 |
| Package | 17mm x 17mm, 0.65mm pitch, 368-pin LFBGA; 14mm x 14mm, 0.5mm pitch, 400-pin LFBGA |
| Release date | 2026-09-10 |
| ADC | 8-channel, 12-bit |
| Sub-CPU | 1-core Arm Cortex-M33 |
| PCI Express | PCIe Gen2, 1-lane, 5.0GT/s |
| Power modes | Idle mode, Sub-CPU mode, and deep standby mode with S2R on/off support |
| TSN support | IEEE 802.1 TSN on Gigabit Ethernet |
| Linux support | CIP Linux SLTS kernel v6.12 with long-term maintenance support |
| Main CPU options | Dual-core or quad-core Arm Cortex-A55 |
| Ethernet interfaces | 2x Gigabit Ethernet |
| External Bus Interface | 8-bit and 16-bit random access support |
| Standby power consumption | 1mW class with DDR self-refresh support |
| ExBUS theoretical bandwidth | Up to approximately 133MB/s at 133MHz CKIO under normal access without wait states |
| Operating junction temperature | Tj = -40°C to +125°C |
