TDK’s μPOL FS1525 Pushes Vertical Power Delivery Toward 200 A Density

Feeding modern AI devices has become a game of balancing current density, transient control, and the shrinking space available under high performance processors. As backside power delivery moves from an idea into real implementation, designers are looking for power stages that live directly beneath the compute device without stacking a tower of external components. TDK’s FS1525 enters that space with a footprint that sits close to semiconductor scale while offering a current path that can be multiplied upward into the 200 A range.

Power Delivery That Moves Under The Package

A common challenge in today’s AI hardware is how far the regulator sits from the silicon it feeds. Long routes introduce losses, impedance shifts and timing problems during fast transients. Vertical power delivery aims to solve this by placing the converter directly under the ASIC or FPGA. The FS1525 supports that model by delivering 25 A in a module only 3.82 mm tall and small enough to live beneath large processors. When several units are stacked or paralleled, the current scales toward 200 A without forcing changes to board height or complex copper structures. This becomes important when new compute devices push current steps faster than the PDN can respond.

A 3D Power Architecture With Integrated Magnetics

One detail worth noting is how much of the power train sits inside the FS1525 itself. The controller, driver, digital core, MOSFETs, memory banks, bypass capacitors and the inductor are all embedded in a chip scale package that measures 7.65 by 6.80 mm. This reduces loop areas, shortens switching paths and keeps the regulator’s internal dynamics far more predictable across temperature. The thermal impedance of 1.4 K per watt also gives the device stable behavior at high ambient temperatures, which matters when placing power stages near heat generating silicon. For engineers, the takeaway is that the FS1525 behaves more like a monolithic device than a discrete regulator cluster.

Electrical Behavior Suited To Low Voltage AI Rails

Modern AI and networking processors run core voltages between 0.6 and 1.8 V with aggressive load steps and low tolerance for ripple. The FS1525 is tuned for this environment. The module supports input rails from 4.5 to 16 V and regulates with sub 5 mV peak to peak ripple on SERDES and other noise sensitive rails. Fast transient response helps maintain stability during training and inference workloads where current steps can swing quickly. Differential remote sensing improves accuracy directly at the point of load, which is useful when routing space is limited or when the PDN geometry changes with each board variant.

Digital Control And System Level Telemetry

The FS1525 aligns with current trends toward data driven power management. Digital programmability over I2C or PMBus enables real time telemetry for voltage, current and temperature, as well as fault monitoring and adaptive tuning. This allows the regulator to respond to workload changes rather than hold static compensation. Analog output settings are also available for designers building around specific FPGA or ASIC platforms. In practice, this reduces bring up time when matching rails to devices that rely on vendor specific voltage tuning schemes.

Integration Into High Density Compute Platforms

As PCIe cards, VPX modules and 1U to 3U rack systems continue to compress power budgets into smaller volumes, a module that acts as a complete point of load converter provides a useful architectural shift. The FS1525 fits into those platforms without external compensation or elaborate magnetics. It has already been adopted in power stages for several FPGA families and advanced SoC platforms used in AI, edge computing and imaging. The unified structure of TDK’s μPOL portfolio means designers can scale from low current rails to 200 A configurations while keeping the same control model and thermal behavior across the system.

Learn more and read the original announcement at www.tdk.com