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Filtering by tag: "semiconductor supply chain"
Clear tag filterAI Memory Crises Now Hits DDR2 With 60% Price Increases
Never would I have thought that in 2026, DDR2 prices would surge, but that is exactly what is happening as the ongoing AI-driven memory shortage continues to work its way down through older memory standards. What exactly is happening with the memory crisis, why is DDR2 now drying up, and what does this mean for engineers developing new technology?
Read MoreApple Now Considering Intel and Samsung For Future Devices over TSMC
In a move that some did not expect, Apple is floating the idea of looking at Samsung and Intel as its providers for custom chips over TSMC, now that TSMC supply is being taken over by AI industries. What challenges is the rise of AI introducing for those needing custom chips, what has Apple said, and what does this show us regarding the ongoing chip supply issues?
Read MoreCPU Shortage Could Soon Ease With Intel’s 18A Process
The global CPU shortage, driven by surging AI demand and high DRAM prices, has made CPUs harder to find than memory, with both Intel and AMD struggling to meet market needs. Intel’s upcoming 18A process and Panther Lake CPUs offer hope for relief, but challenges remain. Will Intel’s 18A process truly resolve the shortage, how long until markets stabilize, and could consumer-focused startups offer new solutions?
Read MoreThe AI Tax: Why Your Next Computer and Car Are Becoming Collateral Damage in the Silicon Supercycle
ASC Global outlines how AI demand is reshaping memory supply, raising costs, and pushing PCs, automotive, and industrial systems into tighter component constraints.
Read MoreIntel Breaking the 2nm Barrier with Panther Lake on 18A Process
As the semiconductor industry pushes beyond 2nm toward angstrom-class technologies, manufacturing faces extreme physical, economic, and scientific limits. This article explores sub-2nm scaling challenges, quantum effects, EUV and high-NA lithography costs, Intel’s 18A Panther Lake ambitions, foundry expansion in the US, and why future progress may rely on chiplets, 3D packaging, and new integration strategies rather than simple transistor shrinking.
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