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Filtering by tag: "ML-KEM"
Clear tag filterLattice Launches Mach-N2 FPGAs with Post-Quantum Security and 16 Gbps SerDes
Lattice launches Mach-N2 secure control FPGAs with up to 220k logic cells, post-quantum security, integrated flash and 16 Gbps SerDes.
Read MoreLattice Semiconductor, Lattice, Mach-N2, FPGA, secure FPGA, control FPGA, Nexus 2, programmable logic, post-quantum cryptography, PQC, ML-KEM, ML-DSA, Root of Trust, hardware security, PUF, DICE, SPDM, AES-256-GCM, PCIe 4.0, 10G Ethernet, SerDes, system control, system management, data center, industrial electronics, communications infrastructure, Lattice Radiant, Lattice Prompt
STMicroelectronics Introduces ST54M Secure Mobile Chip with Post-Quantum Cryptography
STMicroelectronics has launched the ST54M secure mobile chip, combining NFC, secure element, eSIM functionality, and a hardware accelerator for ML-KEM and ML-DSA post-quantum cryptography algorithms.
Read MoreMicrochip Adds PQC Root Of Trust Controllers For Secure Boot
Microchip TS1800 and TS50x controllers add post-quantum-ready secure boot, hardware PQC acceleration, attestation, and root of trust support for infrastructure systems.
Read MoreMicrochip, TS1800, TS50x, Trust Shield, TrustFLEX, root of trust, platform root of trust, secure boot, post-quantum cryptography, PQC, ML-DSA, ML-KEM, LMS, ECC P-384, Arm Cortex-M4F, firmware security, attestation, cybersecurity, data center security, infrastructure security, OCP, NIST SP 800-193, CNSA 2.0
