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Filtering by tag: "electronic design automation"

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Cadence Extends AI Design Platform to PCB and Advanced Packaging

Cadence has introduced AuraStack AI Super Agent, extending its AI-assisted design platform to PCB and advanced packaging. Running on Allegro AI Studio, the software combines layout, optimisation, and multiphysics analysis in a unified workflow.

Cadence, AuraStack, Allegro AI Studio, PCB design, advanced packaging, EDA, electronic design automation, AI design, multiphysics analysis, signal integrity, power integrity, thermal analysis, mechanical analysis, package design, PCB layout, AI infrastructure, high-performance computing, engineering software, design automation

Chinese University Creates 3D Chip Design Tool for Huawei’s Logic Folding Architecture

Recently we covered Huawei’s development of a LogicFolding technology to increase device density, but now researchers from China have created a tool to help convert chip designs into 3D folded structures. What exactly does the tool do and why could technologies like Logic Folding be the future for semiconductors?

3D chip design, LogicFolding architecture, Huawei semiconductors, Peking University EDA tool, electronic design automation, 3D integrated circuits, vertical chip integration, semiconductor density, Kirin processors, Tau Scaling Law, ISCAS 2026, chip layout complexity, domestic Chinese EDA tools, transistor scaling, semiconductor innovation, chip design tools, 3D chip technology

Why Input Linearity Matters in RF Receiver Design

Qorvo recently published a blog on the importance of input linearity in RF receiver design, written with contributions from David Corman (Chief Systems Architect) and David Schnaufer (Corporate, Technical Marketing Manager). The original article explores how balancing input linearity with noise figure is key to optimising receiver performance, particularly in dense signal environments.

RF design, input linearity, IIP3, IP3, IP2, intermodulation distortion, amplifier linearity, signal distortion, RF receivers, noise figure, gain trade offs, spectral regrowth, compression point, RF system design, OIP3, RF performance, high frequency electronics, analog design, wireless communication, Qorvo, RF engineering, receiver sensitivity, input intercept point, radio frequency, electronic design automation

Cadence Extends AI Design Platform to PCB and Advanced Packaging

Chinese University Creates 3D Chip Design Tool for Huawei’s Logic Folding Architecture

Why Input Linearity Matters in RF Receiver Design

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